The present disclosure relates to a semiconductor fabrication technology, and more particularly, to a method for fabricating an insulation layer, which is capable of preventing a nitride layer from being lost to a phosphorus-containing insulation layer, and a method for fabricating a semiconductor device using the same.
As a semiconductor device becomes more highly integrated, the circuit pattern sizes/dimensions are reduced, and the aspect ratio between the patterns is increased. Thus, the margin of gap-fill processes is reduced. Therefore, insulation layers such as a borophospho silicate glass (BPSG) which have appropriate reflow characteristics, are used as an interlayer dielectric layer filling the gaps between the patterns. If a thermal treatment is performed on a deposited BPSG layer, a reflow occurs in the BPSG layer. Thus, flatness can be ensured and inter-layer defects such as void can be removed.
FIG. 1 is a cross-sectional view of a typical semiconductor device including an interlay dielectric layer, and FIGS. 2A and 2B are cross-sectional views for explaining limitations encountered with the typical semiconductor device.
Referring to FIG. 1, a plurality of gates 105 are arranged over a substrate 101 such that a gap between the gates 105 is smaller in a cell region than in a peripheral region (S1<S2), and a gate spacer layer 106 is formed on both sidewalls of the gate 105. A nitride layer 108 is disposed along the surface of a resulting structure including the gates 105, and a BPSG layer 107 is formed on the nitride layer 108 as an interlayer dielectric layer filling the gap between the gates 105. The gate has a stacked structure in which a gate dielectric layer 102, a gate electrode 103, and a gate hard mask layer 104 are sequentially formed.
The nitride layer 108 prevents impurities (for example, phosphorus (P) and boron (B)) contained in the BPSG layer 107 from penetrating into the substrate 101 or the gates 105, and protects the lower structure.
However, during a reflow thermal treatment for removing defects such as voids in the BPSG layer 107 and stepped surface, a loss of nitride layer 108 is caused by the BPSG layer 107, thus degrading characteristics of the semiconductor device. This is because phosphorus (P) in the BPSG layer 107 reacts with water (H2O) in the atmosphere to form a phosphoric acid which will etch the nitride layer 108.
Also, since the nitride layer 108 is formed in the cell region and the peripheral region at the same time, the nitride layer 108 has an equal thickness in the cell region and in the peripheral region, but loss degrees of the nitride layer 108, which are derived from the BPSG layer 107, are different due to the gap difference between the gates 105 in the cell region and the peripheral region. Since an amount of the BPSG layer 107 filled between the gates 105 in the cell region is larger than that filled between the gates 105 of the peripheral region, the amount of loss of the nitride layer 108 formed in the peripheral region is larger than that of the nitride layer 108 formed in the cell region. Therefore, the thickness of the nitride layer 108 remaining after the reflow thermal treatment of the BPSG layer 107 is larger in the cell region than in the peripheral region (T1>T2). The difference in the loss amount of the nitride layer 108 due to the gap difference of the gates 105 degrades the characteristics of the semiconductor device, which will be described below in detail with reference to FIGS. 2A and 2B.
FIG. 2A is a cross-sectional view illustrating a case where the thickness of the nitride layer 108 remaining after the reflow thermal treatment of the BPSG layer 107 is suitable for the cell region. In this case, the nitride layer 108 formed in the peripheral region is excessively lost. When the nitride layer 107 is excessively lost, in particular, when the thickness of the remaining nitride layer 108 is less than 55 Å, impurities contained in the BPSG layer 107, especially boron (B), penetrate into the substrate 101 or the gates 105, degrading the characteristics of the semiconductor device.
FIG. 2B is a cross-sectional view illustrating a case where the thickness of the nitride layer 108 remaining after the reflow thermal treatment of the BPSG layer 107 is suitable for the peripheral region, that is, the thickness of the nitride layer 108 remaining in the peripheral region is greater than at least 55 Å. In this case, the nitride layer 108 which remains in the cell region is thicker than actually necessary. Thus, the nitride layer 108 is left on the substrate 101 in a process of forming a contact hole 109 for a landing plug, which will cause a contact-not-open phenomenon.